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Fedora ARM Secondary Architecture/SheevaPlug

680 bytes added, 15:07, 16 April 2010
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== '''SheevaPlug Specifications''' ==
Sheeva CPU Core
1.2 GHz operation
L1 Cache: 16K Instruction + 16K Data
L2 Cache: 256KB
Memory
DDR2 400MHz, 16-bit bus
512MB DDR2: 1Gb x8, 4 devices
Power efficient Samsung devices
NAND FLASH Controller, 8-bit bus
512MB NAND FLASH: 4Gb x8, direct boot
128-bit eFuse Memory
Power
Power input: 100-240VAC/50-60Hz 19W
DC Consumption: 5V/3.0A
High efficiency POL DC-DC converters
Development Interface
System Development Board
JTAG and Console Interface via USB
SDIO expansion
JTAG OpenOCD support via USB
High speed I/O & Peripherals
GE, USB 2.0 Host
RTC w/ Battery
 
UL/CE/FCC certified
 
 
[http://www.globalscaletechnologies.com/p-22-sheevaplug-dev-kit-us.aspx For more information]
== '''Accessing SheevaPlug from a Windows box''' ==
[http://apvsbr700.blogspot.com/2010/04/connecting-to-sheevaplug-using-windows.html Connecting to the Sheevaplug Using Windows]
 

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