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Make and Makefiles

79 bytes added, 23:26, 4 September 2014
Complex Dependencies
There are several things worth noting about this ''Makefile'':
# Variables are used for the name of the compiler and the compiler flags. This makes it very easy to change these values -- to use the ''gcc'' compiler, for example, the CC variable could simply be changed to ''gcc''. If variables were not used, you would have to change every line that invoked the compiler.
# ''all'' is a dummy target. Since it appears as the first target in the file, it is executed firstby default if no target is specified as an argument to the <code>make</code> command. It depends on the ''half'' and ''double'' files, which will be built in order to satisfy the dependency. However, the ''all'' target does not specify any commands, and the file <code>all</code> will never be built.
When ''make'' is executed the first time, five compilations are performed:

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