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Winter 2017 SPO600 Weekly Schedule

6,533 bytes added, 14:23, 4 April 2017
Evaluation
[[Category:Winter 2017 SPO600]]
This is the schedule and main index page for the [[SPO600]] ''Software Portability and Optimization'' course for Winter 2017.
<!-- {{Admon/important|It's Alive!|This [[SPO600]] weekly schedule will be updated as the course proceeds - dates and content are subject to change. The cells in the summary table will be linked to relevant resources and labs as the course progresses.}} <!-->{{Admon/cautionimportant|Old Contentbeing Updated|This page contains information for is in the process of being updated from a previous version of the coursesemester's content. It will be is not yet fully updated for Winter 2017. Do not rely on the accuracy of this information until this warning is removed.}}-->
* Previous semester: [[Winter 2016 SPO600 Weekly Schedule]].
{|cellspacing="0" width="100%" cellpadding="5" border="1" style="background: #e0e0ff"
|-
!Week!!Week of...!!width="28%"|Class I<br/>Tuesday1:30-3:15!!width="28%"|Class II<br/>Friday1:30-3:15!!width="28%"|Deliverables<br/>(Summary - click for details)
|-
|1||Jan 119||[[#Tuesday (Jan 12)Week 1 - Class I|Introduction to Software Porting, Portability, Benchmarking, and Optimization / How is code accepted into an open source project? (Lab 1)]]||[[#Friday (Jan 15)Week 1 - Class II|Overview of Working with Code and Building Software (Lab 2)]]||[[#Week 1 Deliverables|Set up accounts, and blog your conclusion to Lab 2.]]
|-
|2||Jan 1816||[[#Tuesday (Jan 19)Week 2 - Class I|Computer Architecture Overview]]||[[#Friday (Jan 22)Week 2 - Class II|Assembly Lab (Lab 3)]]||[[#Week 2 Deliverables|Blog about the Code Review Lab (Lab 1)]]
|-
|3||Jan 2523||[[#Tuesday (Jan 26)Week 3 - Class I|Assembly Lab (Lab 3) - continued]]||[[#Friday (Jan 29)Week 3 - Class II|Compiled C Lab (Lab 4)]]||[[#Week 3 Deliverables|Blog about the Assembly Lab (Lab 3) and Compiled C Lab (Lab 4)]]
|-
|4||Feb 1Jan 30||[[#Tuesday (Feb 2)Week 4 - Class I|Software Optimization]]||[[#Friday (Feb 5)Week 4 - Class II|Algorithm Selection Lab (Lab 5)]]||[[#Week 4 Deliverables|Blog about the Algorithm Selection Lab (Lab 5).]]
|-
|5||Feb 86|||[[#Tuesday (Feb 9)Week 5 - Class I|Algorithm Selection Lab (Lab 5) Continued]]||[[#Friday (Feb 12)Week 5 - Class II|SIMD and Auto-Vectorization (Lab 6)]]||[[#Week 5 Deliverables|Blog your the Algorithm Selection Lab (Lab 5) and the Auto-Vectorization Lab (Lab 6).]]
|-
|6||Feb 1513||[[#Tuesday Week 6 - Class I|Inline Assembler Lab (Feb 16Lab 7)|Memory architecture]]||[[#Friday (Feb 19)Week 6 - Class II|Inline Assembler Lab (Lab 7)continued...]]||[[#Week 6 Deliverables|Blog about your Inline Assembler Lab (Lab 7).]]
|-
|7||Feb 2220||[[#Tuesday (Feb 23)Week 7 - Class I|Course Presentation AssignmentMemory Architecture]]||[[#Friday (Feb 26)Week 7 - Class II|Project Startup]]||[[#Week 7 Deliverables|Blog about your selected presentation and project topics.]]
|-style="background: #f0f0ff"
|Study Week||Feb 2927||colspan="3" align="center"|Study Week - No classes!
|-
|8||Mar 76||style="background:[[#f0f0ff" colspan="2" align="center"Week 8 - Class I|Linaro Connect Project Discussion]]||[[#Week 8 - No classes. Prepare for your presentation and work on your project.Class II|Presentations]]||[[#Week 8 Deliverables|Prepare for your presentation and work on Blog about your project.]]
|-
|9||Mar 1413||[[#Tuesday (Mar 15)Week 9 - Class I|PresentationsProfiling]]||[[#Friday (Mar 18)Week 9 - Class II|PresentationsBenchmarking]]||[[#Week 9 Deliverables|Blog about your Presentationproject work.]]
|-
|10||Mar 2220||[[#Tuesday (Mar 23)|Project Stage I Updates]]||style="background:[[#f0f0ff"Friday (Mar 26)|Good Friday - No ClassesDiscussion & Hack Session]]||[[#Week 10 Deliverables|Blog about your Stage I Update.]]
|-
|11||Mar 2827||[[#Tuesday (Mar 29)|Discussion & Hack Session]]||[[#Friday (Apr 1)|Discussion & Hack Session]]||[[#Week 11 Deliverables|Blog about your project work.]]
|-
|12||Apr 43||[[#Tuesday (Apr 5)|Discussion & Hack Session]]||[[#Friday (Apr 8)|Project Stage II Updates]]||[[#Week 12 Deliverables|Blog about your Stage II Update.]]
|-
|13||Apr 1110||[[#Tuesday (Apr 12)|Wrap-Up Discussion]]||[[#Friday (Apr 15)|Project Stage III Updates]]||[[#Week 13 Deliverables|Blog about your project, including the Stage III Update, and write a wrap-up post about the course.]]
|-
|Labs||align="right"|10%||See deliverables column above. All labs must be submitted by April 21.
|-
|Project work||align="right"|60%||3 stages: 15% (Sunday, March 2926) / 20% (Thursday, April 109) / 25% (Saturday, April 2122)
|}
== Week 1 ==
=== Tuesday (Jan 12) Week 1 - Class I ===
==== Introduction to the Problems ====
** Direct access to hardware features, e.g., CPUID registers
* Most of the historical reasons for including assembler are no longer valid. Modern compilers can out-perform most hand-optimized assembly code, atomic operations can be handled by libraries or [[Compiler Intrinsics|compiler intrinsics]], and most hardware access should be performed through the operating system or appropriate libraries.
* A new architecture has appeared: Aarch64AArch64, which is part of [http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php ARMv8]. This is the first new [[Computer Architecture|computer architecture]] to appear in several years (at least, the first mainstream computer architecture).
* At this point, most key open source software (the software typically present in a Linux distribution such as Ubuntu or Fedora, for example) now runs on AArch64. However, it may not run as well as on older architectures (such as x86_64).
* Background for the [[SPO600 Code Review Lab|Code Review Lab (Lab 1)]].
=== Friday (Jan 15) Week 1 - Class II ===
* [[Overview of the Build and Release Process]]
*# Building the Code
*#* Configuration tools (autotools, cmake)
*#* [[Makeand Makefiles|Make]]
*#* The compiler toolchain
*#** Preprocessor
# Course setup:
## Set up your [[SPO600 Communication Tools]] - in particular, set up a blog and add it to [http://zenit.senecac.on.ca/~chris.tyler/planet/ Planet CDOT] (via the [[Planet CDOT Feed List]]).
## Add yourself to the [[Winter 2016 2017 SPO600 Participants]] page (leave the projects columns blank).
## Generate a [[SSH#Using_Public_Keys_with_SSH|pair of keys]] for [[SSH]] and email the public key to your professor.
## Sign and return the [[Open Source Professional Option Student Agreement]].
# Complete Labs
## [[SPO600 Code Review Lab|Code Review Lab (Lab 1)]] (Due end of week 2)
## [[SPO600 Code Building Lab|Code Building Lab (Lab 2)]] (Due end of week 12)
# Optional (recommended): [[SPO600 Host Setup|Set up a personal Fedora system]].
# Optional (recommended): Purchase an AArch64 development board (such as a [http://96boards.org 96Boards] HiKeyor Raspberry Pi 3).
== Week 2 ==
=== Tuesday (Jan 19) Week 2 - Class I ===
* [[Computer Architecture]] overview (see also the [[:Category:Computer Architecture|Computer Architecture Category]])
=== Friday (Jan 22) Week 2 - Class II ===
* [[SPO600 Assembler Lab|Assembly language lab]] (lab 3)
=== Week 2 Deliverables ===
 
* Blog your conclusion to the [[SPO600 Code Review Lab|Code Review Lab]] (Lab 1)
 
== Week 3 ==
 
=== Week 3 - Class I ===
 
* Continue group work on [[SPO600 Assembler Lab|Lab 3]].
 
=== Week 3 - Class II ===
 
* [[SPO600 Compiled C Lab]] (Lab 4)
 
=== Week 3 Deliverables ===
 
* Blog your conclusion to:
** [[SPO600 Assembler Lab|Lab 3]]
** [[SPO600 Compiled C Lab|Lab 4]]
 
== Week 4 ==
 
=== Week 4 - Class I ===
 
Software Optimization
* [[Compiler Optimizations]]
* [[Profile Guided Optimization]]
* Algorithm Selection
 
=== Week 4 - Class II ===
 
* [[SPO600 Algorithm Selection Lab]] (Lab 5)
 
=== Week 4 Deliverables ===
 
* Blog about your Lab 5 results.
 
== Week 5 ==
 
=== Week 5 - Class I ===
 
* Finish the [[SPO600 Algorithm Selection Lab|Algorithm Selection Lab]]
 
=== Week 5 - Class II ===
 
* Introduction to Vector Processing/SIMD
* [[SPO600 Vectorization Lab|Vectorization Lab]] (Lab 6)
 
=== Week 5 Deliverables ===
 
* Blog your results for the [[SPO600 Algorithm Selection Lab|Algorithm Selection Lab]] (Lab 5)
* Blog your results for the [[SPO600 Vectorization Lab|Vectorization Lab]] (Lab 6)
* For each of the above, be sure to include links to your code, detailed results, and your reflection on the lab.
 
== Week 6 ==
 
=== Week 6 - Class I ===
* [[Inline Assembly Language]] -- often used for:
*# Implementing a memory barrier
*# Performing an [[Atomic Operation]]
*#* '''Atomics''' are operations which must be completed in a single step (or appear to be completed in a single step) without potential interruption.
*#* Wikipedia has a good basic overview of the need for atomicity in the article on [http://en.wikipedia.org/wiki/Linearizability Linerarizability]
*# Gaining performance (by accessing processor features not exposed by the high-level language being used (C, C++, ...))
* [[SPO600 Inline Assembler Lab|Inline Assembler Lab]] (Lab 7)
 
=== Week 6 - Class II ===
* [[SPO600 Inline Assembler Lab|Inline Assembler Lab]] (Lab 7) continued...
 
=== Week 6 Deliverables ===
* Blog your Lab 7 results.
 
== Week 7 ==
 
=== Week 7 - Class I ===
 
==== Overview/Review of Processor Operation ====
 
* Fetch-decode-dispatch-execute cycle
* Pipelining
* Branch Prediction
* In-order vs. Out-of-order execution
** Micro-ops
 
==== Memory Basics ====
 
* Organization of Memory
** System organization
** Process organization
*** Text, data
*** Stack
*** Heap
* Memory Speeds
* Cache
** Cache lookup
** Cache synchronization and invalidation
** Cache line size
* Prefetch
** Prefetch hinting
 
==== Memory Architecture ====
 
* Virtual Memory and Memory Management Units (MMUs)
** General principles of VM and operation of MMUs
** Memory protection
*** Unmapped Regions
*** Write Protection
*** Execute Protection
*** Privilege Levels
** Swapping
** Text sharing
** Data sharing
** Shared memory for Inter-Process Communication
** Copy-on-Write (CoW)
** Demand Loading
** Memory mapped files
 
==== Memory Barriers ====
'''Memory Barriers''' ensure that memory accesses are sequenced so that multiple threads, processes, cores, or IO devices see a predictable view of memory.
* Leif Lindholm provides an excellent explanation of memory barriers.
** Blog series - I recommend this series, especially the introduction, as a very clear explanation of memory barrier issues.
*** Part 1 - [http://community.arm.com/groups/processors/blog/2011/03/22/memory-access-ordering--an-introduction Memory Access Ordering - An Introduction]
*** Part 2 - [http://community.arm.com/groups/processors/blog/2011/04/11/memory-access-ordering-part-2--barriers-and-the-linux-kernel Memory Access Ordering Part 2 - Barriers and the Linux Kernel]
*** Part 3 - [http://community.arm.com/groups/processors/blog/2011/10/19/memory-access-ordering-part-3--memory-access-ordering-in-the-arm-architecture Memory Access Ordering Part 3 - Memory Access Ordering in the ARM Architecture]
** Presentation at Embedded Linux Conference 2010 (Note: Acquire/Release in C++11 and ARMv8 aarch64 appeared after this presentation):
*** [http://elinux.org/images/f/fa/Software_implications_memory_systems.pdf Slides]
*** [http://free-electrons.com/pub/video/2010/elce/elce2010-lindholm-memory-450p.webm Video]
* [http://www.rdrop.com/users/paulmck/scalability/paper/whymb.2010.07.23a.pdf Memory Barriers - A Hardware View for Software Hackers] - This is a highly-rated paper that explains memory barrier issues - as the title suggests, it is designed to describe the hardware origin of the problem to software developers. Despite the fact that it is an introduction to the topic, it is still very technical.
* [http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka14041.html ARM Technical Support Knowlege Article - In what situations might I need to insert memory barrier instructions?] - Note that there are some additional mechanisms present in ARMv8 aarch64, including Acquire/Release.
* [https://www.kernel.org/doc/Documentation/memory-barriers.txt Kernel Documentation on Memory Barriers] - discusses the memory barrier issue generally, and the solutions used within the Linux kernel. This is part of the kernel documentation.
* Acquire-Release mechanisms
** [http://blogs.msdn.com/b/oldnewthing/archive/2008/10/03/8969397.aspx MSDN Blog Post] with a very clear explanation of Acquire-Release.
** [http://preshing.com/20130922/acquire-and-release-fences/ Preshing on Programming post] with a good explanation.
** [http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.genc010197a/index.html ARMv8 Instruction Set Architecture Manual] (ARM InfoCentre registration required) - See the section on Acquire/Release and Load/Store, especially Load/Store Exclusive (e.g., LDREX)
 
==== The Future of Memory ====
 
* NUMA (on steroids!)
* Non-volatile, byte-addressed main memory
* Non-local memory
* Memory encryption
 
=== Week 7 - Class II ===
 
* [[Winter 2017 SPO600 Project|Course Project]]
 
=== Week 7 Deliverables ===
 
* Blog your Lab 7 results, including the second part
* (To be announced: Project Deliverables)
 
== Week 8 ==
 
=== Week 8 - Class I ===
 
* Project Discussions
 
=== Week 8 - Class II ===
 
* Project Presentation #0
** Selected glibc function(s)
** Plan of Action
 
=== Week 8 Deliverables ===
 
* Blog about your selected function(s) and project plan
** Remember: You should be posting 1-2 times per week
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== Week 3 ==
* [[SPO600 Vectorization Lab|Vectorization Lab]] (Lab 6)
==== Week 5 Deliverables ====
* Blog your results for the [[SPO600 Algorithm Selection Lab|Algorithm Selection Lab]] (Lab 5)
* Complete ALL your blogging for this course by Midnight on Thursday, April 21. Make sure that you have included all of the labs, your presentation, and your project work. Remember that there should be at least 1-2 posts per week. Your blogging from April 1-April 21 will be used for your April communication mark.
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