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→Performance
== Performance ==
Each 6502 instruction takes a defined number of machine cycles to execute. In some cases, the number of cycles will vary depending on the circumstances of the instruction's execution - for example, the conditional branch instruction <code>BRE</code> (Branch if EQual) takes:* 2 cycles if the branch is not taken* 3 cycles if a branch is taken to an address in the same page* 4 cycles if a branch is taken to an address in another page
Remember that the Program Counter (PC register) contains a pointer to the next instruction to be executed. When the BEQ instruction has been loaded into the CPU, the PC points to the instruction following the BEQ. The branch works by adding a signed integer value (in the range of -128 to +127) to the Program Counter; the extra cycle required when the branch is taken is used to process the addition. If the high byte of the Program Counter changes (because the branch crosses in to another page), one additional cycle is required to adjust the high byte.
You can find the execution time in the instruction charts found in the [[#Resources|Resources]] section below.
To convert the number of cycles to time, multiply the cycles by the time between system [[Clock|clock]] pulses. Many 6502 systems operated at 1 MHz (1 million operations per second), and therefore 1 cycle corresponded to 1 millionth of a second, or 1 microsecond (uS). Therefore, an instruction that took 4 clock cycles would take 4 uS to execute.
== Loading and Storing Data (to/from Memory) ==
