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When any type of interrupt is received, the [[Register#Program Counter|program counter]] is saved (typically pushed by pushing it on the [[Stack|stack]]or storing it in a dedicated register), and then the program counter is loaded from an ''interrupt vector'' stored in a register or a pre-defined memory location, usually at the top or bottom of physical [[Address|address space]]. Effectively, this means that a subroutine jump is performed to the interrupt-handling routine. In systems where multiple devices are connected to one hardware interrupt line, it is necessary to poll the PIC/APIC or the attached devices to determine which one(s) triggered the interrupt before servicing the request(s). When the interrupt routine exits, the original program counter location is restored, and execution of the interrupted program continues.

Many debugging tools use a software interrupt for single-stepping through a program - for example, on a 6502, the instruction after the one to be executed by single-stepping is replaced with a BRK instruction (opcode 00), so that control will immediately return to the debugger after one instruction is executed. In other cases, the debugger regains control by scheduling a timer-based hardware non-maskable interrupt (NMI) to occur during the execution of the next instrutioninstruction, using a peripheral timer chip.