Fedora ARM Secondary Architecture/SheevaPlug

1. == SheevaPlug Specifications ==

1. Sheeva CPU Core

1. 1.2 GHz operation

1. L1 Cache: 16K Instruction + 16K Data

1. L2 Cache: 256KB

1. Memory

1. DDR2 400MHz, 16-bit bus

1. 512MB DDR2: 1Gb x8, 4 devices

1. Power efficient Samsung devices

1. NAND FLASH Controller, 8-bit bus

1. 512MB NAND FLASH: 4Gb x8, direct boot

1. 128-bit eFuse Memory

1. Power

1. • Power input: 100-240VAC/50-60Hz 19W
2. DC Consumption: 5V/3.0A
   • High efficiency POL DC-DC converters

1. Development Interface

1. • System Development Board
   • JTAG and Console Interface via USB
   • SDIO expansion
   • JTAG OpenOCD support via USB

1. High speed I/O & Peripherals

1. • GE, USB 2.0 Host
   • RTC w/ Battery

1. UL/CE/FCC certified

For more information

Accessing SheevaPlug from a Windows box

Connecting to the Sheevaplug Using Windows

Installing F12 on an SD and booting from the SheevaPlug

Installing F12 on an SD

Configuring U-boot