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Created page with 'Category:Computer Architecture An ''opcode'' is an ''operation code'', a numeric value specifying that a particular instruction should be performed. Opcodes ma…'
[[Category:Computer Architecture]]
An ''opcode'' is an ''[[Operation|operation]] code'', a numeric value specifying that a particular instruction should be performed.
Opcodes may be distinct bytes or words, possibly including an addressing mode indication, or they may be embedded within a larger instruction word.
For example, the byte $A4 (0xA4) is the 6502 opcode for "LDY zero-page" - an instruction to load the Y register using the zero-page addressing mode. Zero-page addressing requires a one-byte argument: the byte within the zero page from which the Y register should be loaded. Therefore, the entire instruction will be two bytes long: the opcode, and the argument. Other instructions will be longer or shorter.
On the other hand, the ARM aarch32 instruction 0xe3a00cff encodes the opcode for "mov" instruction, the register number (0), the [[Immediate Value|immediate value]] 0xff, and a 6-bit right shift into a single 32-bit [[Word|word]]. All instructions will be the same length.
An ''opcode'' is an ''[[Operation|operation]] code'', a numeric value specifying that a particular instruction should be performed.
Opcodes may be distinct bytes or words, possibly including an addressing mode indication, or they may be embedded within a larger instruction word.
For example, the byte $A4 (0xA4) is the 6502 opcode for "LDY zero-page" - an instruction to load the Y register using the zero-page addressing mode. Zero-page addressing requires a one-byte argument: the byte within the zero page from which the Y register should be loaded. Therefore, the entire instruction will be two bytes long: the opcode, and the argument. Other instructions will be longer or shorter.
On the other hand, the ARM aarch32 instruction 0xe3a00cff encodes the opcode for "mov" instruction, the register number (0), the [[Immediate Value|immediate value]] 0xff, and a 6-bit right shift into a single 32-bit [[Word|word]]. All instructions will be the same length.