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Created page with 'Category:Computer Architecture{{Chris Tyler Draft}}A register is a high-speed memory location within a CPU. Various types of registers are used in combination in various com…'
[[Category:Computer Architecture]]{{Chris Tyler Draft}}A register is a high-speed memory location within a CPU.
Various types of registers are used in combination in various computer architectures:
* '''General-purpose registers''' are used to temporarily store values.
* '''Accumulators''' hold the results of mathematical operations (originally add/subtracts, but now any numerical operation).
* '''Status registers''' (or Flag registers, or Condition code registers) contain flag bits, which are set/cleared/tested either explicitly (by instructions) or implicitly (as the result of other operations). For example, the ARM aarch32 "Z" flag is set ("1") if an operation has a non-zero result, and cleared ("0") if an operation has a non-zero result. This flag is one bit within the Application Processor Status Register (APSR).
* '''Control registers''' alter the operation of the processor, such as by enabling binary coded decimal (BCD) math or toggling [[Endian|little-endian/big-endian]] mode.
Various types of registers are used in combination in various computer architectures:
* '''General-purpose registers''' are used to temporarily store values.
* '''Accumulators''' hold the results of mathematical operations (originally add/subtracts, but now any numerical operation).
* '''Status registers''' (or Flag registers, or Condition code registers) contain flag bits, which are set/cleared/tested either explicitly (by instructions) or implicitly (as the result of other operations). For example, the ARM aarch32 "Z" flag is set ("1") if an operation has a non-zero result, and cleared ("0") if an operation has a non-zero result. This flag is one bit within the Application Processor Status Register (APSR).
* '''Control registers''' alter the operation of the processor, such as by enabling binary coded decimal (BCD) math or toggling [[Endian|little-endian/big-endian]] mode.