Difference between revisions of "Endian"
Chris Tyler (talk | contribs) (Created page with 'The ''Endian''-ism of a processor refers to the order in which multi-byte values are stored in memory. == Little-Endian == Little-endian systems store the least-significant byt…') |
Chris Tyler (talk | contribs) |
||
Line 1: | Line 1: | ||
+ | [[Category:Computer Architecture]]{{Chris Tyler Draft}} | ||
The ''Endian''-ism of a processor refers to the order in which multi-byte values are stored in memory. | The ''Endian''-ism of a processor refers to the order in which multi-byte values are stored in memory. | ||
Revision as of 20:09, 15 December 2013
The Endian-ism of a processor refers to the order in which multi-byte values are stored in memory.
Little-Endian
Little-endian systems store the least-significant byte of a multi-byte value at the lowest address.
For example, on 6502 systems (with a 8 bit/1 byte word size), the 16-bit value $FFEE stored at address $1000 would be stored like this:
$1000 $EE $1001 $FF
Likewise, on an x86_64 system, the 64-bit value 0xFFEEDDCCBBAA9988 would be stored at memory location 0x1000 like this:
0x1000 0x88 0x1001 0x99 0x1002 0xAA 0x1003 0xBB 0x1004 0xCC 0x1005 0xDD 0x1006 0xEE 0x1007 0xFF
Big-Endian
Big-endian systems store multi-byte values with the most significant byte at the lowest address.
For example, on a Motorola 68030 CPU, the value 0xFFEEDDCC would be written at memory location 0x1000 as:
0x1000 0xFF 0x1001 0xEE 0x1002 0xDD 0x1003 0xCC
Bi-endian
Bi-endian CPUs can store data in either format (though sometimes not instructions). ARM Aarch32 and Aarch64 systems, PowerPC, Alpha, recent SPARC, MIPS, and Itanium systems are bi-endian.
Other Memory Sequences
There are a few, rare architectures which store values in a sequence other than strict little-endian or big-endian format.