Difference between revisions of "Stack"
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[[Category:Computer Architecture]] | [[Category:Computer Architecture]] | ||
− | A ''stack'' is an | + | A ''stack'' is an area of memory where values are added (pushed) or removed (pulled) to/from the end of the stack only. Most CPU designs incorporate one or more hardware-managed stacks which are used to store and restore state information during subroutine calls, exceptions, and interrupts. |
− | Hardware stacks are implemented through the use of a [[Register#Stack Pointer|stack pointer]] register, which is used for indirect read/writes, with the stack pointer automatically incremented or decremented on each access | + | On some architectures, the stack grows downward in memory; in others, it grows upward. Hardware stacks are implemented through the use of a [[Register#Stack Pointer|stack pointer]] register, which is used for indirect read/writes, with the stack pointer automatically incremented or decremented on each access. |
In a few historical cases (e.g., old Intel 4004 and 8008 processors) the stack was implemented in registers internal to the CPU rather than in general address space. | In a few historical cases (e.g., old Intel 4004 and 8008 processors) the stack was implemented in registers internal to the CPU rather than in general address space. |
Latest revision as of 13:59, 30 August 2022
A stack is an area of memory where values are added (pushed) or removed (pulled) to/from the end of the stack only. Most CPU designs incorporate one or more hardware-managed stacks which are used to store and restore state information during subroutine calls, exceptions, and interrupts.
On some architectures, the stack grows downward in memory; in others, it grows upward. Hardware stacks are implemented through the use of a stack pointer register, which is used for indirect read/writes, with the stack pointer automatically incremented or decremented on each access.
In a few historical cases (e.g., old Intel 4004 and 8008 processors) the stack was implemented in registers internal to the CPU rather than in general address space.