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6502 Instructions - Introduction

6,274 bytes added, 01:59, 11 September 2023
Miscellaneous Instructions
{{Chris Tyler Draft}}[[Category:6502]][[Category:Assembly Language]]
The [[6502]] processor has a compact instruction set, consisting of just 56 instructions:
<code> ADC AND ASL BCC BCS BEQ BIT BMI BNE BPL BRK BVC BVS CLC CLD CLI CLV CMP CPX CPY DEC DEX DEY EOR INC INX INY JMP JSR LDA LDX LDY LSR NOP ORA PHA PHP PLA PLP ROL ROR RTI RTS SBC SEC SED SEI STA STX STY TAX TAY TSX TXA TXS TYA</code>This page groups these instructions into functional categories and explains their basic purpose.
{{Admon/tip|Addressing Modes and Registers are essential!|Take the time to understand the [[6502 Addressing Modes|6502 addressing modes]] and [[6502#Registers|registers]]. This page groups these is essential background infromation for understanding the 6502 instructions and explains their basic function.}}
== Addressing Modes ==
There are 13 thirteen [[6502 Addressing Modes]]. All of these instructions work with at least one addressing mode, and many work with several addressing modes. See the [[#Resources|Resources]] section for Opcode tables that define which instructions work with which addressing modes. == Registers == Most of these instructions work with [[Register|registers]]. Refer to the [[6502#Registers|6502 page, Register section]] for details on the 6502's internal registers.
== Performance ==
To convert the number of cycles to time, multiply the cycles by the time between system [[Clock|clock]] pulses. Many 6502 systems operated at 1 MHz (1 million operations per second), and therefore 1 cycle corresponded to 1 millionth of a second, or 1 microsecond (uS). Therefore, an instruction that took 4 clock cycles would take 4 uS to execute.
== Instructions by Category == === Loading and Storing Data (to/from Memory) ===
==== Register-Memory Loads and Stores ====
There are three instructions to load data from memory to a register:
<code> LDA ; load the accumulator LDX ; load the X register LDY ; load the Y register</code>
And there are three matching instructions to store data from a register to a memory location:
STA ; store the accumulator STX ; store the X register STY ; store the Y register ==== Push/Pull on the Stack ==== When a value is pushed to the stack, the selected register is written to memory location $0100+SP and the stack pointer register (SP) is decremented. When a value is pulled from the stack, the stack pointer register (SP) is incremented and the selected register is loaded from memory location $0100+SP. There are two instructions to push data onto the stack:  PHA ; push the accumulator PHP ; push the processor status register (SR) And two matching instructions to pull data from the stack:  PLA ; pull the accumulator PLP ; pull the processor status register (SR) Note that some other operations, such as JSR, interrupts, RTI, and RTS, cause data to be pushed to or pulled from the stack. ==== Transferring Data between Registers ==== The X and Y registers can be transferred to/from the accumulator:  TAX ; transfer A to X TAY ; transfer A to Y TXA ; transfer X to A TYA ; transfer Y to A You can also transfer the Stack Pointer (SP) to/from the X register:  TSX ; transfer SP to X TXS ; tranfer X to SP It is not possible to directly transfer the Status Register (SR) to a general-purpose register, but you can you transfer it via the stack (e.g., by pushing SR to the stack with with <code>PHP</code> and then popping the stack to the accumulator with <code>PLA</code>). === Arithmetic and Bitwise Operations === {{Admon/tip|Watch the Carry Flag!|Failing to clear the carry flag before addition or to set the carry flag before subtraction is the cause of many bugs in 6502 programs. The carry flag also affects the rotate instructions. Be sure to set or clear this flag with the <code>SEC</code> or <code>CLC</code> instructions when needed!}} '''For full details on all of the arithmetic and bitwise instructions, see the [[6502 Math]] page.''' The 6502 has basic addition and subtraction instructions, which operate on the accumulator (A):STA ADC ; add with carry SBC ; store subtract with carry There are also increment and decrement instructions for the accumulatorX and Y registers and for memory:  DEC ; decrement memory DEX ; decrement X register DEY ; decrement Y register
STX INC ; store the increment memory INX ; increment X register INY ; increment Y register The 6502 also has instructions for left and right bit-shifts and rotations (which can act as multiply-by-2 and divide-by-2):  ASL ; arithmetic shift left ROL ; rotate left
STY LSR ; store logical shift right ROR ; rotate right There are also instructions for bitwise operations such as exclusive-OR, OR, and AND. Exclusive-OR with #$FF is equivalent to a NOT operation, and these operations can be combined to produce other logical operations such as NOR and NAND.  AND ; bitwise AND (with accumulator) EOR ; bitwise exclusive-OR (with accumulator) ORA ; bitwise OR (with accumulator) === Test and Comparison Operations === The A, X, and Y registers can be directly compared with immediate or memory values:  CMP ; compare accumulator CPX ; compare X register CPY ; compare Y register These operations are performed by subtraction. The appropriate condition flags are set, and the Y result of the subtraction is discarded. Conditional branch instructions can be used to alter program flow based on the results of the comparisons. There is another test instruction available:  BIT ; bit test This instruction places bit 7 of the operand into the N flag and bit 6 of the operand into the V flag. The operand is then ANDed with the accumulator, and the Z flag is set if the result is zero. The result of the AND is discarded. In this way, you can test the value of bit 7, bit 6, or any arbitrary bits (using the operand). Note that in addition to these instructions, many other instructions (such as registerloads) affect condition flags. === Program Flow === ==== Unconditional Jump ==== An unconditional jump is like a "Goto" -- it sets the address of the next instruction to be executed (by modifying the Program Counter (PC)):  JMP ; jump to address </code>==== Jump to SubRoutine ==== A jump to a subroutine is also unconditional, but the current value of the Program Counter (PC) is placed on the stack so that when the subroutine (aka procedure, function, or method) is finished, execution can resume at the instruction after the jump to subroutine:  JSR ; jump to subroutine (pushes PC on stack, loads operand into PC) RTS ; return from subroutine (pops PC from stack)
=== Push/Pull on the Stack = Conditional Branch ====
When A conditional branch is like a value is pushed to the stackjump, the stack pointer except that it is decremented and the selected register only performed if a certain condition is written to $0100+SP.met:
When a value BCC ; branch on carry clear (C flag is pulled from the stack, the stack pointer clear) BCS ; branch on carry set (C flag is incremented and the selected register set) BEQ ; branch if equal (Z flag is loaded from $0100+SP.set) BMI ; branch if minus (N flag is set) BNE ; branch if not equal (Z flag is clear) BPL ; branch if plus (N flag is clear) BVC ; branch if overflow clear (V flag is clear) BVS ; branch if overflow set (V flag is set)
There are two Note that the operand for conditional branch instructions is a relative offset - a signed 8-bit value (in the range -128 to +127) that is added to push data onto the stackcurrent PC. When writing assembler (or viewing disassembled code), the operand is ''written'' as an absolute address or label, but the actual [[Machine Language|machine language]] code uses the relative addressing mode. For this reason, a branch that is too far will not assemble and will produce an error message. === Manipulating Flags === The 6502 provides instructions for setting and clearing various condition flags:
<code> CLC ; clear carry flag (C) - required before using ADC (for single-byte and lowest-byte) CLD ; clear decimal flag (D) - switches into binary math mode CLI ; clear interrupt disable (I) - enables processor interruptsPHA CLV ; push the accumulatorclear overflow flag (V)
PHP SEC ; push the set carry flag (C) - required before using SBC (for single-byte and lowest-byte) SED ; set decimal flag (D) - switches into decimal math mode SEI ; set interrupt disable - turns off processor status registerinterrupts</code>Note that there is no instruction to set the overflow (V) flag.
And two matching instructions === Miscellaneous Instructions ===  BRK ; "BREAK" - turn control over to pull data from the stack:debugger
<code>PLA ; pull This instruction initiates a special version of the accumulator PLP ; pull Non-Maskable Interrupt - "Non-maskable" meaning that the processor status registerI've been swamped!  </code>interrupt flag (I) cannot disable this signal.
Note that some other operations, such as JSR, interrupts, RTI, and RTS, cause data to be pushed to or pulled ; return from the stack.interrupt
== Bitwise Operations ==<code>RTI</code> is very similar to <code>RTS</code> (ReTurn from Subroutine), but is used to return from interrupts.
=== Arithmetic === NOP ; no operation
The <code>ADC ; add with carryNOP</code>instruction does nothing. It can be used to pad code for alignment purposes, or unwanted code can be overwritten in situ with this opcode to disable it.
The accumulator + memory location + carry flag is stored to the accumulator (<code>A = A + M + C</code>).= Resources ==
The carry flag can be used to carry overflow information from These resources provide detailed summaries of the lowest byte to 6502 instructions, including the highest byte number of a multi-byte addition. Clear cycles required to execute the carry flag and then add the lowest bytesinstructions, flags affected by each instruction, then leave the carry flag untouched and add the second-lowest bytesaddressing modes available:* [http://www.6502.org/tutorials/6502opcodes.html 6502 Opcodes with Register Definitions]* [https://www.masswerk. Continue to the highest byte in the multi-byte sequenceat/6502/6502_instruction_set.html 6502 Opcodes with Detailed Operation Information]