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SPO600 Vectorization Lab

304 bytes added, 12:52, 2 October 2019
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[[Category:SPO600 Labs- Retired]]
{{Admon/lab|Purpose of this Lab|This lab is designed to explore single instruction/multiple data (SIMD) vectorization, and the auto-vectorization capabilities of the GCC compiler.}}
{{Admon/tip|Tiny Lab|This is intended to be a very short lab. Don't overcomplicate it!}}
{{Admon/important|This lab is not used in the current semester.|Please refer to the other labs in the [[:Category:SPO600 Labs|SPO600 Labs]] category.}}
== Lab 5 ==
== Optional Lab (Recommended!) == # Write a short program that creates two 1000-element integer arrays and fills them with random numbersin the range -1000 to +1000, then sums those two arrays element-by-element to a third array, and finally sums the third array to a long int and prints the result.# Compile this program on one of the AArch64/ARM64 [[SPO600 Servers#AArch64: aarchie|aarchie]] in such a way that the code is auto-vectorized.# Annotate the emitted code (i.e., obtain a dissassembly via <code>objdump -d</code> and add comments to the instructions in <code>&lt;main&gt;</code> explaining what the code does). '''Prove that the code is vectorized''', for example, by pointing out the use of vector registers and SIMD instructions.# '''Write a blog post discussing your findings'''. Include:
#* The source code
#* The compiler command line used to build the code
#* Your annotated dissassembly listing- '''Prove that the code is vectorized''', for example, by pointing out the use of vector registers and SIMD instructions.
#* Your reflections on the experience and the results

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