Difference between revisions of "Instruction Set Architecture"
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| − | [[Category:Computer Architecture]] | + | [[Category:Computer Architecture]]The Instruction Set Architecture of a processor is the set of [[Instruction|instructions]] which that processor can execute, the [[Addressing Mode|addressing modes]] available, and the [[Instruction Encoding|encoding]] of those instructions as [[Machine Language|machine code]]. |
Latest revision as of 12:40, 26 September 2019
The Instruction Set Architecture of a processor is the set of instructions which that processor can execute, the addressing modes available, and the encoding of those instructions as machine code.
