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Word

1,075 bytes added, 11:57, 5 September 2018
Bit
A ''hardware word'' is the group of bits normally managed by a processor. The word size is a distinguishing feature of a processor, and is typically a power-of-two multiple of eight bits (8, 16, 32, or 64 bits), although some rare or early processors used different word sizes.
The word size is usually associated with the size of general-purpose [[Register|registers]] and the amount of data read from or written to memory at one time. Most modern processors can read/write alternate word sizes (for example, a "64-bit" x86_64 system can also read/write 32, 16, and 8 bit values to/from memory, and 64-bit registers can be accessed as 32, 16, or 8-bit subsets). Additionally, many modern systems use a different memory word size than CPU word size (for example, a "64-bit" system may be built to read/write memory 128 bits at a time), but this is transparent to the programmer and user.
== Common Names for Various Word Sizes ==
* True or False
* On or Off (electrically)
* Positive or Negative charge, or Forward or Reverse current flow (electrically - differential signalling)
=== Byte ===
A nibble (or nybble) is a half-byte, corresponding to one hexadecimal or BCD digit.
 
=== Half word, Single word, Double word, Quad word ===
 
The terms half word (or halfword or half-word), single word, double word, and quad word are often used in contemporary computing to refer to common word sizes relative to a 32-bit base word size:
* half word = 16 bits
* single word = 32 bits
* double word = 64 bits
* quad word = 128 bits
 
This terminology can be seen, for example, in the lane naming conventions for AArch64 SIMD (where <code>v0.8h</code> refers to the 128-bit vector register 0 divided in eight half word lanes) and x86_86 instruction suffixes (MOVQ to move a quad word).
 
The 32-bit base size is reflective of the 32-bit standard integer size used in the predominant LP64 (and less common ILP32) programming models.

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